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Torc is an open-source C++ infrastructure and tool set for reconfigurable computing, released under the GNU GPL 3.0 license. It is suitable for custom research applications, for CAD tool development, and for architecture exploration.

Researchers are often sidetracked from their work by tool and infrastructure needs, and much existing research therefore builds upon simplified device models, or provides only limited support for commercial netlist formats.

The Torc infrastructure can read, write, and manipulate EDIF and XDL netlists, as well as Xilinx bitstream packets (but not configuration frame internals). Torc also provides exhaustive wiring and logic information for all major Xilinx devices, derived from non-proprietary sources. Similar support for Altera architectures and designs could be provided if the necessary data were available. Torc also supports any custom research architecture that can be described in XDLRC.

Currently supported devices include all Virtex, VirtexE, Virtex2, Virtex2 Pro, Virtex4, Virtex5, Virtex6, Virtex6L, Spartan3E, Spartan6, and Spartan6L devices. Torc consists of compilable C++ code, but provides no downloadable executables. The user is responsible for using the provided functionality to build their own executables for the target system, very possibly an embedded system.

Documentation exists primarily in the form of example code, unit test code, and Doxygen documentation.

Check out a working copy of the Torc repository from GitHub. Getting Started explains the requirements and build process. Additional information is available in Examples, Documentation, Supports, and FAQ pages.